Low-Dielectric Constant Materials for On-Chip Applications
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While the prefix nano- became the scientific buzzword for the last decade of the 20th century, nanotechnology has become the technology driver for the 21st. Although nanotechnology really means the ability to fabricate and control functioning structures integrated over size scales ranging from nanometers to centimeters, “smaller” has captured the imagination of the public and funding agencies.
The semiconductor industry is an example built on the foundations of nanotechnology. Integrated semiconductor devices have become progressively smaller to improve performance and accommodate an increase in functional density. This obsession has driven the industry for the last 30–40 yr. As device densities increase and component dimensions shrink, the relative effect of the on-chip wiring on performance progressively increases. Many performance issues can be ameliorated by the introduction of low-k insulators as replacements for silicon dioxide, thus stimulating a flurry of interest in these materials.
In this review, we have focused on the need for new low-k insulators, the timing for introduction of new materials and processes, the chemical nature of the dielectrics and methods of application, the role of porosity in future dielectric insulators and we end with opportunities beyond porous materials. We have tried to focus on the new materials and chemistry; the review does not deal extensively with the characterization and integration of low-k films, except in the context of current integration processes and concerns. The topic of the review is particularly timely given the key role that new materials will play in evolutionary complementary metal oxide semiconductor (CMOS) device performance and the fact that the first truly low-k materials are just now appearing in volume chip manufacturing.