Semiconductor Nanowires for Applications in Macroelectronics

Authors

John A. Rogers Department of Materials Science and Engineering and Beckman Institute, University of Illinois at Urbana-Champaign

Publication Date

7/18/05

Read full article online

Full Article

Abstract

This article briefly reviews preparation and assembly of inorganic semiconductor nanowires and their potential applications in macroelectronics. It is organized into four sections. The first summarizes approaches to generate semiconductor nanowires with controlled dimension, purity, crystallinity, and uniformity. The synthetic, “bottom-up” methods (i.e., growth of nanowires through assembly and crystallization of atoms of precursors) are compared with the complementary “top-down” processes (i.e., preparation of small objects on the nanometer scale by carving, slicing, or etching macroscale material sources). The second section outlines strategies for the formation of ensembles of aligned nanowires, including manipulation of nanowires in solutions with various external forces, in situ growth of aligned nanowires from patterned catalysts, and dry transfer printing of nanowire arrays generated from “top-down” processes. The third section discusses schemes for fabricating high-performance thin-film transistors (TFTs) on plastic substrates using thin films of aligned nanowires. Several examples of devices and their characteristics demonstrate the current state of the technology. The last section concludes with perspectives on the trends for future work related to flexible macroelectronics.